Augmenting DfM and DfA with predictive first-pass yield analysis offers a comprehensive view of manufacturing performance.

Continuous improvement is the mantra that printed circuit board (PCB) manufacturing organizations live and die by. It applies to everything manufacturers do, from managing incoming materials through exceeding customer quality and delivery metrics. Design for manufacturing (DfM) and design for assembly (DfA) are traditional and effective methodologies used to drive process improvements. However, these techniques don’t capture the changing dynamic of actual process and component quality performance. Augmenting DfM and DfA with predictive first-pass yield calculations, based upon up-to-date defect data, offers a more complete view of the product’s manufacturing performance.

To calculate manufacturing yield, the overall PCB defects per board (DPB) must be found. To do this, simply total the individual defects per million opportunities (DPMO) value for each component that will be placed on the board and divide by one million. Statistics can then be used to convert the PCB DPB into a process yield metric. This is an estimate of the probable manufacturing yield for the PCB without any process verification to address the defects.

Process Yield = e^{-Defects Per Board}

In most cases, it is preferable to automate this calculation. FIGURE 1 illustrates how the process yield of a board with 261 components is calculated from the individual DPMO values, along with the final yield given for the in-circuit test (ICT) access of the board. Then, a theoretical maximum yield is calculated which assumes 100% ICT access. Bear in mind that this is not always 100% because some components, such as by-pass capacitors, cannot be electrically tested even with full ICT access.



For part selection purposes, picking components with low DPMO values will have a corresponding increase on the initial first-pass yield (FPY). This process can be further subdivided by splitting an individual component’s DPMO contribution into a portion that is associated with the component itself and another portion that is attributed to each of the soldered connections on the component. Therefore, for a simple two-pin chip resistor, there may be three elements to the overall DPMO of the component, namely: component contribution, pin 1 contribution and pin 2 contribution. Here, the component contribution would account for defects such as presence/absence, orientation, bad component, wrong component and skew. The pin contribution would account for solder opens, shorts and joint quality. Refining the data in these areas can help to develop a more detailed test and inspection strategy, though significant value can be gained by just using DPMO values associated with each unique part number on the board.

Using DPMO information to identify the root cause of the defect will typically show that the largest defect category is solder related. The shape of the stencil aperture is a major contributor to solder defects and is outside of the manufacturer’s control. The primary reason for incorrect apertures is process variability during stencil manufacturing, and eliminating this variability will deliver significant improvements in FPY.

Variability in the stencil manufacturing process stems from the manual manipulation of the data used to create the stencil. PCB manufacturers provide guidelines to their stencil manufacturer that define the rules for the stencil apertures. Manufacturers rely on the stencil vendor to interpret the guidelines and manually apply them to a Gerber file in order to create the data that defines the stencil apertures. Process variability is inherent in any manual manipulation of data, which directly results in defects in the assembly process.

Design tools can automate the task, resulting in a repeatable process that can be used to apply the manufacturer’s stencil guidelines. An automated solution eliminates process variability from the stencil manufacturing process. This technique provides the foundation of a repeatable process to drive continuous improvement.

For example, in a high-volume assembly line, PCB manufacturers have seen a greater than 1% increase in FPY after implementing an automated stencil creation process. The direct benefit of this result is huge cost savings of work in progress (WIP), reduced rework and elimination of scrap.

The high quality levels demanded of today’s PCB manufacturing facilities requires that companies constantly identify new techniques to help forward the quest for continuous improvement. It is imperative to have metrics that aid in eliminating variability and improving first-pass yields. Modern EDA software solutions should be used to automate data analysis and to eliminate process variation, supporting manufacturers’ needs for continuous improvement. PCD&F

Mark Laing is a product marketing manager, Systems Design Division, Mentor Graphics Corporation; This email address is being protected from spambots. You need JavaScript enabled to view it..

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