Either increase the attenuation budget with more expensive silicon or decrease the attenuation with more expensive laminates. The choice is yours.
If you design interconnects for high-speed serial links at 3 Gbps and above, you are probably up against the limits set by the attenuation in the interconnects. In this case, there are only two knobs in your design you can tweak to affect the performance.
Depending on the silicon technology you use, the total attenuation you can tolerate is probably on the order of -10 dB. A good SERDES with pre-emphasis and equalization can expand your attenuation budget to as much as -30 dB, but at the cost of more expensive silicon. Accept the fact that high-speed designs will be more expensive. All you can do is choose whether you put your money into the interconnect or the silicon.
For long interconnects, such as in backplanes, the total length can easily bypass 40 inches. With an attenuation budget of -10 dB, for example, this is an attenuation per length limit of -0.25 dB/inch. Any more and potential problems can arise.
The total attenuation in an interconnect comes from two sources: The conductor loss and dielectric loss. To first order, the conductor loss is frequency dependent due to skin depth effects, which forces currents mostly into the circumference of the signal trace and return path.
This means the trace thickness has only a minor impact on the conductor losses. Only the line width of the trace affects the conductor loss. And, if you increase the line width, you have to increase the dielectric thicknesses to maintain the typical 100 Omega of differential impedance. To minimize via stub effects, thinner is better, so narrower lines are preferred. This forces us into a narrow range of possible line widths.
In either stripline or microstrip, for either a 50 Omega single-ended or 100 Omega differential line, the attenuation from the conductor is -0.72/w x sqrt(f) dB/inch, with the line width, w, in mils and the frequency, f, in GHz. If the line width is 7 mils or wider, then the attenuation is less than -0.1 dB/inch at 1 GHz. It increases with the square root of frequency.
At 7 mil wide lines, the total dielectric thickness in a stripline is about 20 mils. At 10 mils wide, the total thickness will almost 30 mils, at a minimum, for only a small impact on the total attenuation.
The second source of loss is from the dielectric loss of the laminate material. The only knob that affects the dielectric loss is the dissipation factor of the material, usually represented by the term Df. The attenuation from the dielectric is otherwise completely independent of any design features.
The attenuation from the dielectric loss is -2.3 x f x sqrt(Dk) x Df dB/inch, with Dk being the dielectric constant of the laminate and f the frequency in GHz. For FR-4 with Dk = 4 and Df = 0.02, the attenuation from the dielectric loss is -0.1 dB/inch at 1 GHz and increases linearly with frequency.
This suggests that in FR-4, and a line width of 7 mils, the attenuation is going to be about -2 dB/inch at 1 GHz. At 1.56 GHz, roughly the bandwidth for 3.125 Gbps signals, the attenuation is -0.27 dB/inch, right over the attenuation budget for a XAUI signal on a 40-inch line in FR-4. And this leaves nothing else in the budget for impedance missmatch, crosstalk or intra-line skew.
FIGURE 1. Attenuation per length in interconnects due to conductor loss and dielectric loss.
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You have only two knobs to tweak: Increase the attenuation budget by more expensive silicon technology or decrease the attenuation using more expensive laminate materials. The line width options have only a weak impact on the attenuation. Figure 1 shows the relationship between the attenuation per length of a line due to the combination of conductor and dielectric losses. There is only a small incremental impact from increasing the line width to 10 mils. The biggest bang is from the reduction in dissipation factor. Low loss materials have a Df of about 0.01 and very low loss materials have a Df of about 0.005. For long interconnects carrying XAUI 2 signals, at 6.25 Gbps, having signal bandwidths of 3.125 GHz, the only path to success lies in either reducing the attenuation with lower dissipation factor materials, or increasing the attenuation budget with more efficient SERDES silicon technology. PCD&M
Dr. Eric Bogatin is president of Bogatin Enterprises. Many of his papers are available on his Web site, www.BeTheSignal.com. He can be reached at This email address is being protected from spambots. You need JavaScript enabled to view it..
