Design News

TINLEY PARK, IL – The PCB East 2008 conference and exhibition moved into full swing today with the opening of the exhibition and Free Tuesday conference sessions. The morning sessions began with a panel discussion on Next-Generation EDA Tools. Panelists How-Siang Yap of Agilent, Josh Moore of Cadence, John Isaac of Mentor and Nikola Kontic of Zuken talked about challenges facing today's PCB designers.

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MARLBOROUGH, MADownStream Technologies, LLC introduces CAM350 Release 10, the latest version of the verification and optimization tool for printed circuit boards. With the release, users can now integrate CAM350 with Blueprint’s document authoring tool to create a synergistic solution for all PCB post-processing. Users can employ CAM350 and BluePrint to create and distribute the deliverables required for a PCB fabrication and assembly release package in a single electronic file. The electronic release package can then be used to distribute, view and extract documents, Gerber files, NC Drill/Mill data and panel designs for the manufacturing process. CAM350 Release 10 also includes a redesigned user interface, updated to reflect current operating systems and input methodologies.

“It has long been DownStream’s vision to focus on the entire PCB release process and not just point applications. We believe CAM350 Release 10 heralds a new era for post-processing PCB designs by providing the designer the ability to create and manage all of the deliverables required to release a PCB design from engineering into manufacturing,” said Rick Almeida, one of DownStream’s Founders. “Prior to this release, board designers had to deal with managing multiple tools and file formats, including hard copy, to be able to generate the necessary Gerber, drill data, panel designs, BOMs and other documents. With CAM350 Release 10, all of the PCB design deliverables can be stored, managed and edited in a single location creating a new benchmark for post-processing PCB designs,” he added.




PITTSBURGH, PA - DesignAdvance Systems, Inc. has released CircuitSpace v2.2. The new release adds an enhancement to the software that allows users to have bi-directional communication between layout and a PDF schematic. The new feature gives both designers and engineers selection and verification of design elements such as components, nets, or pins within Cadence Allegro and the schematic.

The company claims that designers can reduce board layout and placement time through the use of CircuitSpace's AutoClustering, intelligent design (IP) reuse, and Cross-Probing technologies.
BOULDER, CO - A University of Colorado at Boulder research center, along with the Lockheed Martin Corp. has won a $1.5 million contract to develop technologies that promise to significantly improve thermal management in electronic devices, a major problem for consumer and military electronic system design.

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SMYRNA, GAUP Media Group, parent company of Circuits Assembly and Printed Circuit Design & Fab, will broadcast "Optimize System Performance with FPGA/PCB Co-Design," a 45-minute free Webinar, on June 3, at 2 PM EDT. 
 
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SAN JOSE, CA - According to a report by the EDA Consortium Market Statistics Service (MSS), electronic design automation industry (EDA) Q4 2007 revenue grew 6.7% to $1.6 billion, as compared to $1.5 billion in Q4 2006.

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