WASHINGTON -- DARPA next month will hold a series of workshops on next-generation electronics hardware and the software design tools needed to create as part of its dive into addressing long foreseen challenges to Moore’s law.
Announced in June, DARPA's Electronics Resurgence Initiative (ERI) is a multi-year, $1.5 billion investment in jump-starting innovation and collaboration across the US electronics community. To kickoff this community-wide effort, DARPA is hosting its first annual ERI Summit on Jul. 23-25 in San Francisco. The three-day event will bring together leading voices from across the electronics community–including Alphabet, Applied Materials, Intel, Synopsys, Cadence, Mentor Graphics, NVIDIA, and IBM–to address challenges and opportunities for the next half century of electronics progress.
Some $100 million of the investment will be allocated toward two research programs to a silicon-based compiler designed to speed chip development. Researchers also hope to embed more capability into future design tools, to speed development of printed circuit boards.
The early response to ERI and the ERI Summit is an encouraging sign for the creation of transformative advances in electronics. However, overcoming the technical, economic, and geopolitical challenges threatening the US lead in this space will require ongoing investment and the creation of radical new ideas that go well beyond July, DARPA says. To help foster the open communication and collaboration needed to develop new ERI funding opportunities, DARPA announced an expanded agenda for the ERI Summit with the addition of the ERI “What’s Next” Technical Brainstorming Workshops. Attendees will have an opportunity to participate in four technical workshops on Jul. 23. Each workshop will address targeted applications for specialized, next-generation hardware–specifically artificial intelligence (AI), hardware security, hardware emulation, and photonics.
“As ERI continues to evolve over the next five years, an ongoing, community-wide dialogue must be maintained around the direction and future research efforts required to keep the U.S. at the forefront of microelectronics innovation,” said Bill Chappell, Ph.D., director of DARPA’s Microsystems Technology Office (MTO), which oversees ERI. “For decades, DARPA has helped grow and integrate communities across the electronics ecosystem, and with ERI we are continuing that mission. The workshops create an opportunity for these communities to collectively brainstorm how to further shape the future of the electronics enterprise.”
DARPA program managers, as well as prominent voices in the respective fields of focus, will lead the workshops. Each session will include information about future areas of microelectronics exploration for DARPA as well as an active dialogue between presenters and attendees.
Hardware for Next-Generation Artificial Intelligence (AI) Workshop
As Moore's Law changes, the need to couple the design of AI software with the architecture of its target hardware continues to grow. AI developers will need new hardware structures to support reconfigurable and updateable software architectures as well as adaptive AI software that can exploit dynamic hardware capabilities. DARPA program managers Hava Siegelmann, Ph.D. and Y.K. Chen, Ph.D. will bring together researchers developing next-generation AI software and those developing next-generation hardware. This workshop will explore cutting-edge research in both areas and end with a panel discussion to examine what this work means for future electronics.
Hardware Security Workshop
The novel architectures and design improvements created by ERI offer an opportunity for military-unique specialization within the existing commercial microelectronics market. This workshop will explore how the U.S. can use these new specialization capabilities to strengthen the security of our digital society. DARPA program managers Dr. Kenneth Plaks, Dr. Linton Salmon, and Mr. Walter Weiss will lead a discussion on the potential for hardware specialization for security. DARPA and commercial researchers will describe current research in the area. A panel discussion will follow that explores gaps in the current hardware security portfolio with an eye toward emerging technology opportunities as well as ideas for potential DARPA programs.
Hardware Emulation Workshop
System complexity has fractured the old DoD model of using human analysis for the bulk of verification, resulting in decades-long development times for complex DoD systems. Emerging system emulation methodologies used within the commercial sector show the potential for the development of an emulator that can reduce the design time for a large system by orders of magnitude. However, these methodologies require further innovation before they will be widely adopted. This workshop, led by DARPA program manager Mr. Andreas Olofsson, will provide a forum to discuss new approaches to total system emulation that will enable validation and rapid design of next-generation DoD systems. The session will consist of multiple presentations that highlight current system-level emulation approaches, challenges, and future requirements for commercial and DoD systems, followed by a general Q&A with Mr. Olofsson.
Integrated Photonics Workshop
Integrated photonics technologies promise to enable both “More-Moore” scaling for microelectronic systems and “More-than-Moore” diverse functionality. In the first section of this workshop, led by DARPA program manager Gordon Keeler, Ph.D., DARPA seeks to address the challenges, opportunities, and impact of deeper integration of photonic interconnects within advanced microelectronic computing components such as FPGAs, CPUs, GPUs, and ASICs. Discussions will center on an ultimate goal of enabling large performance gains for future systems by nurturing an accessible ecosystem for photonics and microelectronics co-design, volume fabrication, and packaging, while driving technology innovation for next-generation needs. The second half of the workshop will focus on the potential impact of photonics for sensors, RF signaling, and atomic/quantum systems.
Interested attendees must register in advance to attend the ERI “What’s Next” Technical Brainstorming Workshops. General registration will be open Jun. 25 to Jul. 6. For information, visit www.cvent.com/events/darpa-electronics-resurgence-initiative-eri-summit/event-summary-f20a033c7e4246a482061f082ebbf808.aspx.
