A look at the geometry associated with plated through-holes in a PCB.

Application notes describe how to save layers in a PCB by routing two traces between pins on a 1mm pitch BGA. A leading FPGA vendor recommends this practice to use its very-high-pin-count FPGAs in a low-layer-count PCB. When this approach is used for a high-layer-count PCB, the result is often, if not always, very poor yields, and the board is unreliable when used in a system under actual conditions, as opposed to in a laboratory or a prototype built in a small volume by a specialty shop. The following discussion will illustrate why this approach results in unsatisfactory yields when volume manufacture is attempted.

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