New Products

eLearn PCB Layout  is a web-based learning platform using Cadence Allegro software and PADS Mentor Graphics software. Engineers can use the actual board they are currently designing; can receive feedback with any issues – a free real-time consultation in conjunction with one-on-one PCB training.

CEDA, http://www.ceda.in/PCB_Training_FAQ.html

Release 8.5 compares manufacturing data to design data, graphically finds and displays opens and shorts and marks violations. Performs design rule checks and engineering reviews, including troubleshooting. Runs on Solaris 9, HPUX 11.x, Linux RedHat Enterprise 4 and Windows XP/Vista /Win7.

Adiva, www.adiva.com

 

 

DFM Now! verifies Gerber and drill files for PCB manufacturing.

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Right-angle Q Rate 5mm body design connectors are for backplane and other high-speed applications with coplanar and perpendicular applications. Ground/power plane of QRM8-RA and QRF8-RA series permits contacts to be placed closer together without degrading signal performance. Equipped with ground/power plane and signal-integrity-optimized Edge Rate contacts. Surface of contacts increases wear life; minimizes effects of broadside coupling. Robust when mating and unmating; features a long contact wipe. 0.8mm pitch right-angle system is dual-row and available in 1, 2 or 3 banks, with up to 78 positions per row. Optional guideposts for blind mating are available. Also available in a vertical orientation with stack heights from 7 to 14mm.

Samtec, www.samtec.com

Altium Satellite Vault server application can be local-, LAN-, WAN- or cloud-hosted. Is used to create secure design data repositories that enable collaborative management of electronic design data across the design, procurement and manufacturing spaces. Complement Altium Designer 10 electronic product development system. Vaults can be accessed directly from within Altium Designer 10 or via a standard browser interface. Provide storage, formal revision management and lifecycle state management. Design content is validated when released to a Vault from Altium Designer, where generated content is stored as named revisions that have a definable lifecycle status. Vault items typically represent reusable design content, components and released designs for fabrication of bare boards and electronic assemblies. Can reuse design data.

Altium Limited, www.altium.com

Pantheon PCB/Hybrid/RF layout design application enhancements provide benchmark design performance increases of up to 75x. Performance increases are notable in designs using block technology, which provides opportunities to shorten design cycle times and reduce repetitive edits by allowing full or partial board circuitry to be defined as a block and placed one or more times into another block, board, or panel. Supports placement of sub-blocks within main blocks; maintains connectivity with the schematic at all levels of board hierarchy, while permitting edits and automatic updates.

Intercept Technology, www.intercept.com  

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