AURORA, IL – Vector Fields Inc. has introduced a new variant of Concerto, its advanced RF and microwave design software. ConcertoES offers 3D Finite Difference Time Domain (FDTD) analysis at a lower cost of the full version. It is being introduced with the release of Concerto version 6, which comprises Concerto's advanced 3D geometric modeler and FDTD solver. ConcertoES can reportedly be easily upgraded to the full-scale version of the design suite. Both versions use the same geometric modeler and model formats remain the same, making it easier to reuse models across the range.
"Reducing the cost of FDTD modeling is a significant step to take,” said Managing Director Kevin Ward. “While the full-scale version is competitively priced, we were aware that not everyone can afford, or needs, all of the advanced capabilities that it provides. That is why we decided to introduce ConcertoES, allowing engineers to pay less for top design performance."
WILSONVILLE, OR – Mentor Graphics Corp. announces a new routing technology package that is reported to combine the knowledge of an engineer, the skill of a board designer and the power of an autorouter. According to Mentor, this topology router combines engineering guidelines and designer intuition to improve the autorouting function by following the engineers’ guidelines for bus topology routing and then automatically mimicking typical CAD designer manual edits to form clean bus structures. The topology router consists of two applications. The first is a topology planner used by the engineer to plan and optimize the bus system and subsystem interconnects on the PCB. It assists component placement by allowing the engineer to plan logic pathways optimizing performance and layout.
The topology router automatically routes the bus interconnects following the pathways defined by the engineer. The resulting routing has structure and quality comparable to hand routing completed by experienced designers. The benefits according to Mentor include design cycle time reduction. The bus path data generated is stored and can be incrementally modified and reused for future designs. According to Harry Potts, vice president and general manager of Mentor Graphics’ System Design Division, “…it has been an industry goal to mimic the talents and routing results of an experienced board designer as they follow the guidance of an engineer. By working closely with key customers we have been able to achieve this goal and supply our users with a tool that improves their productivity, quality, performance and manufacturability of the PCB." The topology router is currently released to selective companies for evaluation and will be generally available in the fourth quarter of 2006.
SOUTHPOINTE, PA – Fluent Inc., a wholly owned subsidiary of Ansys Inc., has announced the release of Fluent Connection 1.1 software that helps streamline the process of creating simulation models based on design data from leading CAD packages.
The Fluent UGS NX Connection, Fluent Pro/ENGINEER Wildfire Connection and Fluent SolidWorks Connection products operate within the CAD system user environments and provide tools for checking and conditioning the 3D geometry model in order to ensure that it has been properly prepared for the next step in the simulation process.
Fluent Connection is said to take into account the unique requirement of fluid flow simulations to include a description of the fluid volume inside or surrounding the 3D solid model. By helping the CAD user to identify and isolate this fluid region, Fluent Connection reportedly eliminates the need for the engineering analyst to perform this task outside of the CAD system, saving time and effort during the simulation process.
The Fluent Connection software products have been built using development tools provided under the PTC Partner Advantage Program and UGS and SolidWorks partnership programs.
"We are very appreciative of the support from our CAD/PLM partners under their software developer partnership programs," notes Ferit Boysan, vice president at ANSYS, Inc. "As a leading, independent provider of computer-aided engineering software, ANSYS understands that our customer base needs outstanding connectivity to multiple design tools and PLM systems. The Fluent Connection products are part of our strategy to help customers achieve a streamlined process that facilitates simulation-based design."
TEMECULA, CA – CWAV recently launched its newest software product, the streaming Data Extractor software. Used with CWAV's USBee AX-Pro, it provides a detailed view into embedded communication busses.
"Typically, the challenge faced by engineers is getting data out of an embedded system quickly so as to be able to process it, either to capture a bug in progress or to evaluate performance," says Tim Harvey, principal of CWAV. "We developed the Data Extractor to address this by supporting many of the most common embedded busses available today. No other product on the market allows engineers, students and technicians to capture, find, and debug a sequence that happens hours or even days after the start of a test."
An optional software product, the Data Extractor allows for the extraction of raw data from various embedded busses to store off to disk or stream to another application. It is able to collect raw data from Parallel, Serial, SPI, I2C, I2S, High-Speed Async, USB full- and low-speed, SMBus, 1-Wire and CAN busses.
While there are other stand alone devices on the market, the Data Extractor is reportedly able to support all of the various busses, pull out transaction data on the fly, run indefinitely, capture entire test sequences, monitor embedded system data flows during normal operation, and process or store megabytes, gigabytes or terabytes of information.
SAN JOSE – Cadence Design Systems Inc. has introduced Cadence Incisive Design Team Xtreme III systems, the next generation of the Incisive Xtreme series of accelerator/emulators within the Incisive functional verification platform.
Xtreme III systems are said to simplify the movement to and from simulation and acceleration engines, integrate verification management and debug environments, and support advanced verification methodologies such as assertion-based and transaction-based acceleration. As the highest density (volume per gates) acceleration/emulation system, it offers twice the performance of Xtreme Server with 10-100,000 times the simulation performance gain, supporting up to 72M gates in a single chassis.
The simulation-like, event-driven environment of Xtreme III reportedly provides several verification process automation capabilities for design teams. These capabilities include integration with Incisive Design Team Manager for plan- and metric-driven closure management, integration with the Incisive SimVision simulation debug environment, and support of SystemVerilog Assertions and SystemVerilog Direct Programming Interface.
"The proliferation of system-on-chips and the explosion of verification complexity have resulted in a thirst for more performance at the designer's desktop," said Steve Glaser, corporate vice president of marketing, Verification Division, Cadence. "The Xtreme III series was developed specifically to deliver acceleration to a broad set of design engineers by making it easy for them to use the advanced verification methodologies required to reach predictable verification closure."
Xtreme III systems are offered in two tiers: Xtreme III Desktop, an entry level product that supports simulation, acceleration and targetless emulation, and Xtreme III System that also offers in-circuit emulation capabilities. Both systems can accommodate up to 12 users simultaneously.
DNEPROPETROVSK, Ukraine –Novarm Ltd. has released the latest version of DipTrace 1.23, a PCB design software application package that is said to feature a PCB Layout module, powerful autorouter, schematic capture and component/pattern editors.
DipTrace's autorouter can route single-layer (bottom side) and multilayer circuit boards. There's also an option to autoroute a single-layer board with jumper wires.
The software has a shape-based copper pour system with different possible fill types and thermals to make plane layers or to reduce manufacturing costs by minimizing the amount of etching solution. Its design-rule checking checks the clearance between design objects, minimum size of tracks and through holes