Designer’s Notebook

Making a board producible is entirely in your hands.

The goal of a good documentation package is that it is complete and coherent enough to proceed with the job without any explanations, waivers, errata or feedback of any kind. It doesn't always work that way, particularly when more than one vendor is involved. The fab drawing is more of a baseline from which they will all deviate to one degree or another. Even using the same vendor all the time is no guarantee that the DfM data come back immaculate.

The foundational aspect of PCB fabrication is a plausible phototool. That final imagery is derived from the artwork that you sent their way. What we know as global micro editing is where the phototool is crafted from the ECAD data. The artwork is more like a starting point.

Etch compensation – pre-distorting the artwork.The first item on the CAM operator's list is dealing with etch compensation. The traces and other geometry that appear on the board are what's left behind after the etch process. First, they must drill and plate the holes with copper. That's done prior to etching and adds a measure of copper to the entire panel. Only then do they mask off the circuit pattern that is not to be removed.

Read more: Designing for PCB Manufacturability

Should the ground connections share vias?

Just like it says "on the tin," wafer-level chip-scale packaging (WLCSP) is a technology that shrinks the substrate down to a size quite close to that of the actual silicon, gallium arsenide or whatever material makes up the die. Rather than calling it a substrate, the WLCSP material is known as a redistribution layer, or RDL for short. It's a subtle but important distinction.

By definition, WLCSP devices exclude wire bonding, leaving flip-chip technology as the method of die attach. That means that there is no die cavity where a solid ground plane on the bottom of the die would normally act as the mating surface. Instead, the chip is mounted face down with BGA-style balls on a pitch that is typically less than 0.5mm. Right there, the challenge can be to maintain a good thermal path through the tiny connections (Figure 1).

The solution is to have numerous ground balls to help dissipate thermal energy. The ground balls can be distributed around the device or gathered into a central square or rectangle, maybe both. Either way, it's best if every one of the ground connections gets a dedicated via rather than combining them to share a via.

Read more: What is Wafer-Level Chip-Scale Packaging?

Prepare yourself for unusual circuit patterns.

There is no free lunch when it comes to populating a printed circuit board. Every part has a cost and a failure rate. One of the first projects of my career was a pulse-Doppler surveillance radar called PSTAR. In typical military jargon, that acronym stands for “Portable Search and Target Acquisition Radar.”

My part was the amplifier module that was subdivided into various blocks for easy field service. One of the sub-blocks was a 20dB coupler. It lived inside its own hermetically sealed aluminum housing. The PCB inside had two traces that ran alongside each other, giving the circuit four ports with feedthroughs to the outside world. SMA connectors and semi-rigid cables wired the various modules together.

My responsibilities included the little housing for the coupler, the overall mechanical packaging and all the semi-rigid cable drawings, as well as the RF amplifier. The control board was the only part designed by an external vendor. Meanwhile, the PCB for the coupler had no more than a single 50Ω termination resistor and the feedthrough connectors. We did not yet have PCB design software at that company, so this was done with AutoCAD.

Read more: Printing Analog Circuit Elements Directly on the PCB

Fine tuning the timing of net groups.

When faced with a microcontroller and a companion memory chip, to unravel the crossed-over connections while maintaining high quality microstrip and stripline connections can be a daunting task. Add in the requirement around the time of flight for a typical memory bus or other family of high-speed connections, and you can spend considerable time sorting out that nest of interconnections.

As PCB designers, we go to great lengths to meet the requirements for additional air gaps around transmission lines. Isolating one trace from another becomes more important as the overall length of the traces grows. Crosstalk is a function of how far two traces run parallel to each other at a given distance apart. So, ultimately it is more than the minimum air-gap in play. The length of the boundary also matters.

With a number of connections that start in one general area and end at some other location, it’s easy to picture a river of traces running from here to there. The variance in length between any of the routes is small compared to their total length. Any traces on the long side get pulled tight to minimize their natural length. From that point, the traces that end up too short get some meanders along the way.

Read more: PCB Bus Routing

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