How to design reliable boards that pass radiated emissions requirements.

Reference plane changes in a PCB design exist in many forms: signals transitioning from the IC to the PCB; signals transitioning layers through vias; signals crossing plane splits; and signals going through connectors, just to name a few. They are mainly problematic in that they can radiate unwanted emissions, or EMI, if not properly handled. But reference plane changes can also cause problems with signal degradation and crosstalk. Managing them is a matter of providing continuous return current paths.

Changing planes. What is a reference plane change? For that matter, what is a reference plane? At higher frequencies, signal energy gets coupled from the trace to the nearest “hunks” of metal. If that metal happens to be a solid plane, it is the best case, as it permits controlled impedance on the trace and a nice continuous return path for the return current. Such a plane would be considered a reference plane. If a signal is referencing a specific plane and then transitions to another layer and starts referencing another plane, that is an example of a reference plane change (Figure 1).

Via transitions are very common for signals, but often are not accompanied by the appropriate stitching via or stitching capacitor. For the return current to have a continuous path, there needs to be a nearby transition via or a capacitor. If the new reference plane is at the same potential as the initial reference plane (i.e., if both are ground planes), a transition via will suffice. However, if the two reference planes are at different potentials, as in Figure 1, a capacitor is necessary to stitch the planes together. Whatever is required to stitch the planes together, it needs to be as close to the transition via as possible; the maximum distance is determined by the edge rate of the signal. Faster-edge signals are much more sensitive to stitching via/cap distance. Larger deviations in the return current path lead to radiation of signal energy and signal degradation.

Finding layer transitions. Identifying all these layer transitions in a design can be very time-consuming. Each signal path needs to be followed, and transition vias/caps identified. This can become very complicated to review when there are multiple reference planes, as in the case of innerlayer (stripline) routing. There must be paths in place for all return currents for all reference planes. The process of checking for these types of issues can be automated in a design rule checking tool. An example of a highlighted reference plane change violation is shown in Figure 2.

This design rule check can identify reference plane changes, as well as check for necessary stitching vias/caps nearby. The stitching via/cap should be as close to the layer transition as possible. The “allowable” distance will vary with the signal edge rate, and specifying that distance in terms of time versus length is even more accurate. Since signals propagate at different speeds depending on stackup and inner versus outer layer, it is of added benefit to be able to include the travel time in the checking.

Figure 3 shows an example of how current will be distributed through planes and stitching vias. Notice how the return current from the trace is mirrored below it in the plane, and goes through the stitching via. In this case, because the stitching via is in close proximity to the signal via, very little current radiates into the plane cavity and spreads. This also ensures that less current radiates off the board. The further the via, the more current will radiate into the plane, and ultimately off the board.



Furthermore, if only one stitching via is placed near several signal vias, all those signals will share a return current path through that stitching via. This mechanism of coupling will cause crosstalk between those signals. It is actually quite a common occurrence in boards where stitching vias/caps are not appropriately placed, and all the signals use the same nearest via/cap as part of their return current path.

Control plane changes to control EMI. Reference plane changes through signal vias are probably the most common type of reference plane change in a PCB, but certainly aren’t the only ones. For instance, when going from an IC to the PCB, a signal may change its reference. Fortunately, most ICs contain many power and ground pins, and are surrounded by capacitors, which help with these issues. Similar reference plane changes can occur through connectors as well, especially if a different referencing scheme is used on the two connected boards. By realizing that high-speed signal paths consist of both trace and reference plane, and ensuring a continuous path for both throughout your design, you can design reliable boards that pass radiated emissions requirements.
For more information on EMI and return current, take a look at my September 2012 column.

Patrick Carrier is product manager for high-speed PCB analysis tools at Mentor Graphics (mentor.com); This e-mail address is being protected from spambots. You need JavaScript enabled to view it .