Agilent Releases High-Frequency SPICE Simulation Technology for Software
Published: 29 January 2007
The software is said to offer a complete set of front-to-back simulation and layout tools, and instrument links for RF and microwave IC design in a single, integrated design flow. Its signal integrity solution for high-speed digital design is reportedly made possible through its unique co-simulation technology. The software can model entire serial data links, including interconnects, pre-emphasis and adaptive equalization, in the presence of non-linear driver and receiver models.
Signal Integrity Designer Premier also provides two additional capabilities that are important for accurate high-speed digital design:
- a new, fully integrated set of IBIS (I/O Buffer Information Specification) models for single-ended and differential components such as sources, buffers and terminations
- a broadband SPICE model generator
“Measured or modeled interconnects at data rates exceeding one Gbps are best represented in frequency domain, and it is very difficult for pure time-domain simulators to predict a correct response,” said Sanjeev Gupta, signal integrity application engineer with Agilent’s EEsof EDA division. “To address this challenging technical problem, we’ve developed a new convolution simulator that can automatically enforce passivity on S-parameter models, and can determine, very accurately, the causal time domain response, which represents the original S-parameter data.”
