Apache Introduces Co-Design/Co-Analysis Solution
Published: 21 May 2008
by Staff
MOUNTAIN VIEW, CA -- Apache Design Solutions introduces Sentinel-PI, an integrated IC/package/PCB co-design and co-analysis solution for power integrity. According to the company, the product allows IC package and PCB designers to optimize designs in the prototyping stage and carry through to system signoff, thus reducing design risks, optimizing system cost, and improving productivity. The product is aimed at package and PCB analysis teams working on power and signal integrity of the system.
The tool will help in the design of low power products by letting the IC and PCB designers look for power delivery problems across the entire system early in the process, and optimize all components; package, chip and board. Product capabilities include; a 3D, full-wave power network extraction and power integrity co-analysis engine, DC, AC, and transient/dynamic analysis and integrated Chip Power Model (CPM) for SoC-aware package/board power analysis.
Intended for use early in the design cycle, the tool can provide accurate and predictable package selection, as well as power pad and package decoupling capacitance optimizations. Later in the design flow, it allows package and PCB designers to accurately run power integrity analysis of the package and the PCB with the power delivery network behaviors of the IC, diagnose potential chip-package LC resonance issues, and validate package/board dynamic voltage noise margin.
The tool will help in the design of low power products by letting the IC and PCB designers look for power delivery problems across the entire system early in the process, and optimize all components; package, chip and board. Product capabilities include; a 3D, full-wave power network extraction and power integrity co-analysis engine, DC, AC, and transient/dynamic analysis and integrated Chip Power Model (CPM) for SoC-aware package/board power analysis.
Intended for use early in the design cycle, the tool can provide accurate and predictable package selection, as well as power pad and package decoupling capacitance optimizations. Later in the design flow, it allows package and PCB designers to accurately run power integrity analysis of the package and the PCB with the power delivery network behaviors of the IC, diagnose potential chip-package LC resonance issues, and validate package/board dynamic voltage noise margin.
The 3D full-wave power network extraction and power integrity analysis engines are intended for package and PCB designs. According to Apache, the engine delivers accuracy, performance, and capacity required for a complete chip-package-system co-analysis. The single product enables designers to perform resistance check and static IR-drop analysis (DC), frequency-domain simulation including impedance analysis of multi-port power delivery network of the chip, package, and board (AC), and time-domain dynamic voltage drop analysis (transient).
“Power is a system-level concern that spans the chip, package and PCB. Semiconductor and system companies are looking to chip-package-system co-design to help mitigate risk, optimize cost, and improve productivity. However, traditional co-design solutions have fallen short on integration, accuracy, and interoperability,” said Dave DeMaria, senior vice president of chip-package-system at Apache. “Sentinel-PI is the company’s first product that addresses the system-wide power and noise challenges from IC, to package, to PCB by leveraging our core competencies in SoC power and noise, as well as package/PCB extraction and modeling.”
