BOSTON – Cadence is accepting abstracts for its annual CDNLive Boston, taking place Aug. 30.

Possible topics include mastering advanced-node design challenges; addressing automotive design requirements; accelerating SoC integration with Interface IP; software-driven verification; designing in DDR memory; analog/mixed-signal SoC verification; simplifying functional verification with verification IP; PCB design for manufacturing and testability; PCB high-density interconnect (HDI) and flex designs; silicon photonics; low-power design and verification considerations; digital design and full-flow correlation, and vision processing.  

Abstracts are due May 26.

For more information, visit https://www.cadence.com/content/cadence-www/global/en_US/home/cdnlive.html.