DDR5 Debug Toolkit is for SDA 8 Zi-B and LabMaster 10Zi-A oscilloscopes.

Now supports DDR5/LPDDR5 for test, analysis and debug of DDR design cycle. DDR/LPDDR5 JEDEC specifications JESD79-5 and JESD209-5A feature faster rates of up to 6400 Mb/s. Supported design cycle includes automatic read/write burst separation; burst data jitter analysis; eye diagram mask tests; DDR-specific measurement parameters; and integration with HDA-125 high-speed digital analyzer for command bus analysis.

Teledyne LeCroy
teledynelecroy.com/ddr/