HyperLynx integrates signal and power integrity analysis, 3D-electromagnetic solving, and fast rule checking into a single unified environment. Based on HyperLynx signal integrity/power integrity (SI/PI) application, now offers a complete set of analysis technology sufficient for designing any type of high-speed digital printed circuit board. Simulation engines and graphical user interface support both quick/interactive and exhaustive batch-mode analysis. Now offers 2D/3D signal and power integrity analysis in a single application, with one GUI. Allows, for example, simulation of a critical SERDES channel, and then — by selecting a single new menu item — analysis of a large power net's decoupling. Combines fast geometry extraction engine and advanced materials modeling (for wideband dielectrics, copper roughness, etc.) for accurate simulation. Provides advanced electromagnetic solvers, including full-wave 3D, for increasingly fast SERDES technologies. 3D engine is deeply integrated, so the user never has to learn the intricacies of a full-wave-solver environment. Integration ensures signal and power structure geometries are passed; electromagnetic (EM) ports are formed; simulations are run; and S-parameter results are incorporated into time-domain simulations – automatically. Includes multiple engines — two 2.5D solvers, DC/IR-drop simulator, and quasi-static 3D solver — to enable a full set of PI features, all of which are available side-by-side in the same application as the tool's SI capabilities. A second, more advanced 2.5D solver is capable of pure power and mixed signal-and-power modeling, which can be used to add accuracy to SI simulations when simultaneous-switching-noise (SSN) complications are suspected. DDRx memory interfaces wizard extends to DDR4 and LPDDR4 interfaces. HTML-based reporting allows creation of design documentation and internal Web-based "publication" of results. For SERDES, protocols that support Channel Operating Margin (COM) allow checking the quality of links based on a specific, complex set of simulation steps for a single pass/fail number per-channel. Is said to have the first robust commercial implementation of COM for 100GbE signaling, with simulation details fully automated. Handles very large layouts (including extra-deep stack-ups, huge net counts, and entire multi-board systems); multi-processor and other simulation-engine performance enhancements; and caching and reuse of extracted models.

Mentor Graphics, mentor.com/pcb/hyperlynx