The right test schedule may mean more steps in process, but fewer overall.

A good Lean strategy looks at all elements of the manufacturing process, including how a product is to be tested. From our perspective, ensuring a product is manufactured correctly through electrical test verification is where many designers and manufacturers fail during front-end planning. Test pad locations, for example, are getting tighter and smaller, and many companies aren’t designing for full in-circuit test coverage for this reason. This drives manufacturers to implement and rely more on optical inspection rather than full coverage electrical test. From a Lean perspective, this is a negative trend because ICT is actually the fastest, most actionable way to ensure board quality.

While AOI may catch workmanship defects, it won’t catch defective components. According to an Agilent study, analysis of manufacturing defect root causes suggests 10-15% of defects are attributable to nonfunctioning parts or defective materials versus assembly-process related. We have seen similar statistics with our manufacturing defects trends. So, in addition to reduced throughput, lack of a robust electrical test schedule, such as ICT, can allow material-related defects to slip through the process and to the end-customer.

In optimizing products for Lean manufacturing, EPIC’s process includes design for testability recommendations. First, products are analyzed for design for manufacturing using a rating system that prioritizes recommendations (“DfX for Lean Part II,” Circuits Assembly, May 2008). Then the team looks at the test access restrictions that hinder reliable ICT implementation. Some internal recommended test guidelines include:

• Consider boundary scan if test point availability is an issue. There must be test points on the JTAG pins to use boundary scan.
• All unused leads on devices and connectors should have a test pad.
• All digital IC control and enable pins connected to power or ground should connect via resistor.
• Every net must have a test point.
• Where possible, test points should be distributed evenly across the PCB to equally distribute test pin force across the PCB to minimize board flex.
• Test pads should be located on the lowest component height side of the board.
• EPIC-preferred test pads are 0.040˝ round. Those smaller than 0.032˝ can expect higher test fixture costs, and lower contact reliability in production.
• EPIC-preferred test pad C-C spacing is >/= 0.100˝ (minimum 0.050˝).
• EPIC-standard test pad center to board edge spacing is >0.100˝ (minimum 0.100˝).

A properly designed PCB that permits full coverage access according to these guidelines will result in the lowest installation and operational cost of manufacturing test.

One option for improving ICT coverage is boundary scan, or adding JTAG features into the ICT platforms. Integrating these methods of test in the long run are far less expensive than no test access at all.

Smaller, denser designs push ICT manufacturers to improve ways of reliably contacting the smaller test points. Guided probe fixtures are one example. These fixtures demand a higher price, can be more costly to maintain, and are less reliable than ICT fixtures designed for PCBs that follow recommended guidelines. Each of these points negatively impacts manufacturing cost.

When DfT recommendations cannot be followed to permit full ICT test access, we perform electrical test coverage mapping to determine the best combination of inspection and test to ensure customer quality goals. If limited ICT access is available, this information is analyzed to determine which components are not tested or verified electrically by ICT. When functional test is also used, the untested parts list from ICT will then be compared to the functional test to assess the complete electrical test coverage schedule. The final untested list is then evaluated to determine if manual or optical inspection is necessary to ensure assembly conformance to the specifications. The method of inspection is predicated on the most efficient method in terms of inspection throughput.

Optical inspection strategy. When optical inspection is required, EPIC has chosen to create centralized inspection test centers that include both AOI and automated x-ray inspection, rather than embed AOI/AXI equipment on each line. Products requiring AOI/AXI run through the AOI/AXI test center. Those that do not require inspection go to electrical test. This strategy minimizes capital equipment expense and floor space requirements, as multiple lines feed a single center.

Standardized functional test platforms. A key portion of our Lean strategy has been standardized equipment platforms throughout all factories. While not a new concept in placement and ICT equipment, in this case, it is also extended to functional test platforms. We began developing our own functional test platforms in the 1990s. They use a single software tool and change fixtures for each product. There are variations such as a slide line design that permits volume automated testing of specific products. Operators become versed on the functional platform and common software, so minimal training is required as products are added. Test technology upgrades can be applied across all products.

Additionally, functional testing is designed to mimic product form, fit and function exactly to better correlate with customer data. RF testing, integrated vision testing and LCD or display verification are incorporated in the standard functional test platform. At the IC level, a robust functional test can catch issues that electrical test will not. For example, functional test is required to fully test audio or RF features in an IC.

Basic philosophical principles applied in designing the standardized platform included:

• Modular systems to permit faster scalability as production volume increases.
• Design platforms to enable quick product changeover for top- and bottom-side probing.
• Integrate functional test into production flow to eliminate the possibility of shipping untested products.
• Load/unload process should minimize operator time.
• Include paperless repair tracking of failures.
• When volumes dictate, systems should permit multiple product testing side-by-side, with controlled binning systems.

Customers have multiple options when it comes to designing for and selecting a test strategy. At EPIC, if the product design permits it, ICT is designed as a first priority for the most efficient test process. When impossible, specialized fixturing, gages, optical inspection or functional test are used in combination to ensure a complete test schedule is implemented.

From a Lean perspective, test is an area with many opportunities for improvement. Yet once a product is designed, redesigning for test may not be practical, so inefficiencies remain. Thorough analysis of test strategy during product development and interfacing with the manufacturing teams will pay dividends throughout the product lifecycle in on-time delivery, quality, and process cost.

Chris Munroe is director of engineering at EPIC Technologies (epitech.com); This email address is being protected from spambots. You need JavaScript enabled to view it..