SiP-id software is said to reduce design iterations and improve throughput, reducing time needed to design and verify ultra-complex SiP packages.

Consists of SiP-id (System-in-Package - intelligent design) design kit, an enhanced reference flow including IC packaging and verification tools from Cadence, and a new methodology that aggregates the requirements of wafer-, package- and system-level design into a unified and automated flow. Are tailored for ASE’s advanced IC package technologies. Addresses design and verification of fan-out chip-on-substrate (FOCoS) multi-die packages.

Advanced Semiconductor Engineering

Cadence Design Systems

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