CR-8000 now comes with a design for test (DFT) capability to improve test coverage during schematic entry.
Capability is based on XJTAG’s DFT Assistant, and will be available as a free plugin for CR-8000 Design Gateway users. Will help validate correct JTAG chain connectivity while displaying boundary scan access and coverage onto the schematic diagram through full integration with CR-8000 Design Gateway. Is said to make it easy to see test access as design evolves, allowing optimization of testing before PCBs are produced.
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