Consider these alternatives for advanced PCB design and analysis.

These days, I try to keep up with interesting signal integrity discussions on forums, SI listservs, and LinkedIn. After reading a recent question about PDN models and parasitic extraction on SI-lists, I made the comment (paraphrased) that “S-parameters are overgeneralized.” Someone might rightly ask for clarification, and PCD&F seems the right forum to address this.

The point of the comment is this: S-parameters are not always the most conceptually satisfying mathematical tool – nor the only tool – for analyzing in every situation. Other designers might disagree with this and that’s fine; if you can garner important design insights from S-parameters, rather than some other parameter set, then so be it. My goal isn’t to knock S-parameters, but alternatives have more useful mathematical properties, or a more satisfying conceptual meaning, in certain situations.

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IC vendors should make edge rates easily available for inclusion in PCB design libraries.

PCB layout will eventually be fully automated. Although the effectiveness of automated place-and-route algorithms has declined over the years as designs became more complex, all the ECAD companies have been successfully automating other areas of the design process.

Now the age of artificial intelligence (AI) for ECAD has arrived. Jitx, DeepPCB, Luminovo and Celus already have design-related products using AI. Zuken, Mentor, Altium and Cadence have ongoing development projects applying AI methods. Many obstacles must be overcome. Yet an aspect of PCB layout is ripe for automation today, even without AI.

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SLPs with lines and spaces <35µm are ahead.

Ed.: This is the ninth of an occasional series by the authors of the 2019 iNEMI Roadmap. This information is excerpted from the roadmap, available from iNEMI (inemi.org/2019-roadmap-overview).

The iNEMI Roadmap defines portable and wireless devices as “high-volume consumer products for which cost is the primary driver, including handheld battery-powered products driven by size and weight reduction.”

A significant portion of this sector continues to be dedicated to the relatively mature but still evolving and growing smartphone/phablet/tablet. Although the market segment is mature, the content and functionality of premium tier smartphones are increasing exponentially with the adoption of artificial intelligence (AI) and machine learning (ML). A major emerging growth area in this sector is personal activity monitors, or wearable electronics, which are becoming widely adopted, especially among the more urban and suburban areas of the US and other advanced nations.

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Updates in silicon and electronics technology.

Ed.: This is a special feature courtesy of Binghamton University.

Smallest on-chip optical modulator has switching speed up to 11Gb/s. University of Rochester researchers have created the world’s smallest modulator for photonic integrated circuits, augmenting communications, computing, and photonics research. The device consists of a thin film of lithium niobate (LN) bonded on a silicon dioxide layer to create a modulator that, besides being small, operates at high speed and is energy-efficient. The modulator occupies an electro-optical modal volume of 0.58µm³ and has a modulation bandwidth of 17.5GHz, switching speeds of up to 11Gb/s and a tuning efficiency of up to 1.98GHz/V. Applications include communications, computing, and quantum photonic information processing. (IEEC file #11886, Laser Focus World, 8/27/20)

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