CAD,

  • Mentor Announces Extensions to Pads PCB CAD

    Pads PCB CAD platform features new analog/mixed-signal (AMS) and high-speed analysis tools for mixed-signal design, DDR implementation, and electrically correct design signoff. 

    Features: 

      • Pads AMS Cloud,a cloud-based circuit exploration/simulation environment and user community, addresses analog/mixed signal simulation. Users from all levels of expertise can create and share analog, mixed-signal, and mixed-technology designs in an online, collaborative environment where designs and models can be published or downloaded. Circuit designs created in AMS Cloud can be transferred to the AMS Design Suite desktop environment, eliminating the need to manually recreate circuits to perform advanced analysis and drive the PCB design flow.
      • Pads AMS Design Suite, which allows design and simulation of analog/mixed-signal and digital in one environment. Within one schematic session, both analog circuit simulation leveraging VHDL-AMS, and topology exploration with the HyperLynx tool can be performed. Beyond common core AMS simulation analysis (DC Bias, time-domain, and frequency-domain simulations) additional extended analysis capabilities are included as standard, such as multi-run parametric sweeps, sensitivity, Monte Carlo, and Worst Case analysis to address specific engineering needs.
      • Pads HyperLynx DDR option, for integrated DDR simulation, which identifies and solves signal integrity (SI) and timing issues specific to DDRx designs.
      • Pads HyperLynx DRC tool, which accelerates electrical sign-off process by allowing electrical rules checks and identifying violations that will affect the design integrity and performance of the board. With predefined rules, reportedly quickly identifies issues such as traces crossing voids and traces changing reference planes on large designs. Integrated electrical DRC technology demonstrates PCB designs are electrically correct before hand-off to manufacturing. Key capabilities: Fast and easy time to results with a rules-based approach to identify non-CAD constraints; out-of-the-box checks for EMI, signal integrity and power integrity; easy identification of violations integrated with the PADS PCB product.

    Mentor Graphics, mentor.com

  • Mentor Announces Xpedition Package Integrator Flow

    Xpedition Package Integrator flow performs integrated circuit, package, and printed circuit board co-design and optimization.

  • Mentor Graphics Offers HyperLynx SI/PI

    HyperLynx Signal Integrity/Power Integrity (SI/PI) adds power-aware SI simulation capabilities for accurate modeling and signal performance of high-speed parallel links such as DDR3 and DDR4. Is for high-speed printed circuit board designs. Power-Aware IBIS v5.0 modeling reportedly ensures accurate simulation of simultaneous switching noise and power effects of timing and signal integrity. DDRx Wizard supports the latest JEDEC standards to verify all DDR and LPDDR memory types. Integrated S-parameter extraction and simulation is reportedly accurate and 5 to 10 times faster. High-performance DC drop/thermal co-simulation predicts voltage drop, high current areas, and temperature changes. Addresses high-speed system design problems throughout design flow. Provides tools for pre- and post-layout signal integrity, timing, crosstalk and power integrity analysis to generate accurate simulation results to prevent design re-spins. Models supply currents, including pre-driver effects, switching slowdown due to sagging supply voltage, and better buffer capacitance modeling.

    Mentor Graphics, http://www.mentor.com/pcb/hyperlynx/

     

  • Mentor Graphics Upgrades FloTherm XT Software

    FloTherm XT software has thermal management capabilities for electronic systems, printed circuit boards and packages. Is an integrated mechanical design automation and electronic design automation electronics cooling solution. Has CAD-centric technology and a mesher that simulates complex geometries. Now supports transient analysis, component and board manipulation, Joule heating, parametric studies, extended EDA integration capabilities, and new modeling options, including an ability to represent copper for complex PCBs. Provides design virtual prototyping and “what-if” analysis for product quality and minimized design iterations. PCB copper nets and traces are represented in 3D.

    Mentor Graphics, www.mentor.com

     

  • Mentor Issues Call for Entries for Design Awards

    WILSONVILLE, OR – Mentor Graphics issued a call for entries for its 26th annual Technology Leadership Awards (TLA) competition.

  • Mentor’s Last Deal

    Mike Buetow 

    In the end, Paul Singer did what Carl Icahn couldn’t: got Mentor sold.

  • NI Releases Numerical Cloud

    Numerical Cloud is a monthly online subscription for all NI products. Provides access to upgrades at no additional charge with an active subscription. The subscription includes FAB 3000 - GerberCAM/DFM; ACE 3000 - CAD/EDA/3D translator; access to Windows and Linux version of desktop application; activation on up to three computers; secure login access; unlimited free technical support; new activation code(s); download access 24/7; free software upgrades, and access to pre-released versions of software.

    Numerical Innovations, www.numericalinnovations.com

     

  • Numerical Innovations Releases ACE Translator 3000 v 7.0

    ACE Translator 3000 v 7.0 offers two-way translation between most common EDA, CAD, and 3D formats, in a single intuitive environment. Converts DXF, GDSII, Gerber, Postscript, PDF, ODB++, TIFF, BITMAP, STEP, STL, and more. Built-in viewer verifies translation results. Includes rulers, measurement tools, query, cell browser, hierarchy browser, HighLite broken polygons, plus new editing and repair features.

    Numerical Innovations, numericalinnovations.com/collections/ace-translator-3000

  • Osmond PCB Releases OsmondCocoa v. 1.1.28

    OsmondCocoa v. 1.1.28 PCB design software comes with complete library of text characters by default if other text libraries are not available. Fixes issues that could cause opaque white patches to appear, particularly with Yosemite, when performing peg dragging or clearance checking operations. Full trace length of trace nearest cursor is now automatically displayed at the upper right, along with the X and Y position of the cursor. Two new Lua commands: "path_to_file()", and "path_to_directory()", return strings that contain the full path to the design file and to the directory that contains the design file, respectively. Fixes a bug that could cause a trace or a portion of a trace to not highlight correctly when performing a clearance checking operation.

    Osmond PCB, www.osmondpcb.com

  • PCB Libraries Updates Library Expert

    Library Expert's output to Altium Designer has a new “Script” interface; can import footprints and 3D Step into an existing library or a new library with one part at a time or 10,000 parts in minutes. Automatically applies user-defined user preferences for pad shapes for each component family, working units, drafting outlines, footprint Pin 1 zero orientation, construction rules, solder joint goals and layer assignments. Has a footprint designer; can create footprints using manufacturer recommended pattern data. Pads ASCII still an option, but no longer required. Outputs to formats readable by Allegro, OrCAD PCB, OrCAD Layout, CADint, DesignSpark, Expedition, Pads Layout, Cadstar, CR-5000, Pantheon, Pulsonix, P-CAD, Ultiboard, Target 3001!, Eagle, DipTrace, Board Station, SoloPCB, and Proteus. Outputs 3D Step models readable by an increasing number of CAD tools.

    PCB Libraries, www.pcblibraries.com

  • Quadcept Releases PCB Designer v.7.2.3

    PCB Designer 7.2.3 CAD tool fixes an error that occurs at the time of printing NC drill tables. Software performs panelization, transmission line analysis, mesh plane creation, design rules checks, test pin hole auto-generation, and sets keepout areas and height restrictions, and more. Outputs in Gerber and ODB++.

    Quadcept, https://www.quadcept.com/en/product/pcb.html

  • The Makers March

    Mike BuetowConsolidation is the enemy of innovation. Don’t believe me? Look at how, ahem, fast AT&T rolled out changes during its early heydays.

    Ma Bell – the colloquial name for the telecom monopoly – took three years of testing (!) before it rolled out touchtone phones (aided by the invention of low-cost transistors, which Bell also patented). That was 1963. And the rotary dial was still the norm when I grew up in the 1970s. It wasn’t until the early ’80s that we made the shift, and even then AT&T was still offering rotary for wall-mounted units.

    In 1982, the US government forced the breakup of Ma Bell. Cordless phones were starting to take hold about that time. The breakup unleashed a slew of digital features that to date had been wasting away in research labs. Call waiting was a revelation. Conceived by Western Electric in the 1970s, it was offered an option and hardly commonplace until the mid to late ’90s. Voicemail was invented in 1979.
    It was picked up first by businesses and made its way to consumer accounts only as cellphones began their relentless penetration.

  • The Natural Progression toward Vendor Integration in EDA

    Today I’m talking about the gradual convergence of EDA single tools to integrated systems. In the early days of HiFi home entertainment systems, specialist vendors provided separate record (vinyl!) decks, amplifiers and speakers, then left it to the ingenuity of the customer to build their own system – they still do for the serious audiophiles.

  • The Season of Giving

    Mike Buetow

    What is with all the design freeware? Has the market changed so much that software has become a loss leader? And if so, on what products will CAD developers earn a profit, given that they don’t have hardware divisions?

  • Time to Tune Out

    Mike Buetow

    Showing up might be 80% of life, but even that maxim can be stretched too far. 

  • Ucamco Offers Gerber Rev. 2016.11

    Revision 2016.11 permits inclusion of CAD netlist to Gerber files. New X2 attributes include CAD netlists in Gerber fabrication data; ability to attach component reference designator, pin number and net name to the component pads in outer copper layers; attach netlist name to any conducting object on any copper layer; and attach component reference to any object.

    Ucamco, www.ucamco.com

     

  • Ucamco Updates UcamX v2016.01 Software

    UcamX v2016.01 CAM software includes PP+, a parallel processing feature. Works with UcamX multicore and 64-bit workstation technology. With Backgrounded Outputs feature, CAM seat time can be saved by running CAD data output tasks in the background. Parallelized Image Compare automatically splits large data sets into smaller tiles and compares them on different logical processors using parallel processing. Comes with new workspace defaults that speed up the program's startup and make switching between workspaces faster. Supports latest version of ODB++.

    Ucamco, www.ucamco.com

     

  • What to Do If You Can’t Have Reference Designators

    Are they still needed in the age of machine assembly?

  • Where to Put Panel Tabs

    Duane Benson

    First rule of panel tabs: keep them away from connectors.

  • Will New Seats Mean Different Views?

    Mike Buetow

    For watchers of the printed circuit board design software industry, it’s been a whirlwind month.