Signal Integrity Addressing ‘Power-Aware’ Challenges of Memory Interface Designs Memory interfaces are challenging signal integrity engineers from the chip level to the package, to the board, and across multiple boards. As the latest DDR3 and DDR4 speeds support multi-gigabit parallel bus interfaces with voltage swings smaller than previous generation interfaces, there is no room for error in any modern memory interface design. The combination of complete model libraries, advanced tools and engineering expertise addresses modern buses and data rates. by Ken Willis and Brad Brim
Cover Story Lead-Free Assembly Design for Manufacturability Considerations The changeover to lead-free has brought with it serious implications for many key design rules. A look at the system-level management requirements and key DfM elements shown to improve overall yield, quality and reliability of high-complexity, high-reliability hardware. by Matt Kelly and Mark Hoffmeyer, PH.D.
Quality Assurance Availability Index and Minimized Reliability Costs A model for quantifying how the total cost of improving and maintaining reliability can be minimized, and the relationship of that minimized cost to the availability index. by Ephraim Suhir, Ph.D., and Laurent Bechou, PH.D.
ESD Basics How Much Protection Is Enough? Five questions to ask concerning ESD protection. by The ESD Association
Upverter Designing Hardware in the Cloud A startup company leveraging online collaborative tools to perform printed circuit design using a web browser and, in doing so, driving what it says is the first real technology transformation since Windows. by Mike Buetow
Thermal Management Direct Thermal Exchange and Its Impact on LED Heat Removal A cutting-edge PCB construction methodology for highly-efficient heat removal or thermal dissipation creates a direct thermal path conduction capability and reduces LED junction temperature far more efficiently when compared to traditional FR-4, metal core or aluminum PCB constructions. by Pratish Patel
High-Speed Backplanes Predictability and Efficient Initial Backplane PCB Fabrication The total signal loss is the combination of the losses by the conductor and dielectric laminate, and a successful design requires understanding SI design and low-loss material properties. by Carl F. Hornig
Moisture Protection Influences on Barrier Performance of UV/EB Cured Polymers. by Joshua M. Oliver and Dale S. Babcock