| Zuken Releases CR-5000 v. 14 |
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| Written by Mike Buetow | |||
| Thursday, 02 August 2012 14:32 | |||
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CR-5000 Board Designer constraint setup is now simpler: differential pairs can be created automatically, and new utilities permit constraints to be applied to high-speed signals without accessing the Constraint Editor. Offers improved collaboration during layout and design review. Design mark-ups can be exchanged bi-directionally between Board Designer and Board Viewer Advance for intelligent exchange of feedback. More tightly integrates with Graphical Pin Manager for improved co-design of PCBs and programmable devices, such as FPGAs and ASICs, Changes to high pin count, multi-symbol devices in GPM can be updated collectively and automatically during logical circuit design. For FPGA design, pin constraint files in vendor specific formats, such as Xilinx or Altera, can submitted to FPGA design tools, while updated signals associated to a device pin or signal names can be filtered. Other improvements include new filter options to control attributes while exporting pin-out information for better IP control during ASIC development. Zuken, www.zuken.com/cr-5000
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