| Plating Anomalies and Defects, Part I |
|
|
| Written by Michael Carano | |||
| Wednesday, 03 June 2009 00:00 | |||
Plating defects can have multiple origins, so don’t jump to conclusions.It is a good idea to begin this month’s edition of Positive Plating by presenting a few different plating defects and discussing some of the possible causes and remedies to resolve the problem. Many of these defects have multiple origins. Defects can be the result of multiple problems throughout the manufacturing process, and this may not manifest in the process where the defect actually occurred. When trying to identify the root cause of a defect, it is often best to not jump to conclusions. Not understanding a defect’s true genesis will lead to incorrect remedies to these issues. I will discuss some defects and possible remedies.Blisters (Hole-Wall Pullaway)The common complaint one hears is, “The copper plating is peeling.” Ok, but where is it peeling from, off of the copper surface or from within the via? What about the interconnect? Is the peeling layer the electroless copper deposit or the electrolytic copper? These are the questions one must answer in order to properly trouble shoot the defect. FIGURE 1 shows a real-life example of a blistered or peeling deposit. The copper deposit has actually flaked off or blistered from the hole. In some cases, the deposit does not completely flake off the surface, but instead, pulls away from the hole wall. This condition is referred to as hole-wall pullaway (HWPA).Now the question is where is the origin of the blister? In this case, the good news is that we are only looking at the electroless copper. There has yet to be an electrolytic copper deposit applied to the circuit board, but that is all one can tell at this point. ![]() A more typical example of HWPA is depicted in FIGURE 2. The deposit pulled away from the hole-wall but did not fracture or flake off. Nonetheless, this is a defect and must be remedied. The root cause of HWPA is very similar to those that lead to flaking and blistering. So, one is dealing with the origin of the blister or peeling deposit prior to electrolytic copper plating. TABLE 1 lists the most common causes for this type of defect. Further information about the hole wall condition can be determined by a careful review of the microsection or through SEM analysis. ![]() ![]() Keep in mind that there is no substitute for process control. All of the operators should have a basic understanding of why certain processes must be controlled within the stated limits. This will go a long way in preventing costly rejects. PCD&F Michael Carano is global manager for strategic business development at OM Group, Inc. and can be reached at This e-mail address is being protected from spambots. You need JavaScript enabled to view it .
|
|||
| Last Updated on Wednesday, 03 June 2009 18:13 |
Design News
- Cadence Swings to Q4 Profit
- Cadence Latest to Sign on for Virtual PCB
- Zuken to Exhibit at Virtual PCB
- Altium, EMA to Exhibit at Virtual PCB
- Altium Adds York to University Partners List
- Cadence to Lay Off 120 Workers
- SMTA Named Exclusive Sponsor of Virtual PCB
- NI Creates Grant Program to Support Texas Emerging Technology Fund
- NI Names AMD CTO to Head R&D
- Meptec Finalizes EDA Challenges Symposium
Market News
- Virtual PCB Technical Conference Emerging
- PCB Orders Up 22% in December
- 2009 Semi Sales Slipped 9%
- EDA Q3 2009 Revenue Up Nearly 4% Sequentially
- Global Telecom Service Revenues to Reach $3.7T by 2015
- UP Media Group Issues Call for Papers for PCB West 2010
- Report: Tech Sector to Recover in 2010
- '6 Straight': Component Orders Up Again
- iSuppli: Consumer Electronics Q3 Revenues Up 11% Sequentially
- Consumer Product Safety Commission to Rule on Lead in Electronics
Fab News
- Merix, Viasystems Merger Approved
- Thai Bank to Innovex: Pay Up
- M-Flex Records Record Sales
- TTM Swings to Q4 Profit
- Firan Reports 24% Q4 Sales Drop
- TTM Gets Security OK for Meadville Acquisition
- Printed Circuits Adds Buried Passives Technology
- Nanya Parent May Spend $1B for Capacity Expansion
- Molex Flex Circuit Arm's Sales Dip
- Park Makes Changes to Marketing Group
Products
Grieve Introduces No. 952 Oven
No. 952 is a 550°F electrically-heated forced air convection bench oven, currently used for various programmed heat processings. Workspace dimensions measure 26" x 22" x 16". 3kW installed in Incoloy-sheathed tubular elements provide heat to the workload. A 1/80-HP recirculating blower creates a convection air movement in the chamber. Features 3" insulated walls, an aluminized steel exterior, Type 430 stainless steel interior and an integral oven stand. Has a programmable and recording temperature controller with 10" diameter circular chart, plus a manual reset excess temperature controller...
No. 952 is a 550°F electrically-heated forced air convection bench oven, currently used for various programmed heat processings. Workspace dimensions measure 26" x 22" x 16". 3kW installed in Incoloy-sheathed tubular elements provide heat to the workload. A 1/80-HP recirculating blower creates a convection air movement in the chamber. Features 3" insulated walls, an aluminized steel exterior, Type 430 stainless steel interior and an integral oven stand. Has a programmable and recording temperature controller with 10" diameter circular chart, plus a manual reset excess temperature controller...
Sponsor Links
Low Cost PCB Prototypes
PCB-POOL® manufactures high quality PCB prototypes at exceptional prices!
Receive instant quotes (no registration required) and order your PCBs directly online.
Special Offer: Free Laser SMD stencil with all prototype orders!
Need PCB prototypes fast?
Sunstone Circuits takes the pain out of prototyping! We are dedicated to making the online ordering of PCB prototypes simple, fast, and easy from quote to delivery. Quick access to our 24/7/365 customer service team and easy online order tracking takes the pain out of sourcing prototypes online.
Put us to the test - order Sunstone Circuits today!
Features
Improving Fabrication Yields
How the CAM engineer can make the difference. Embedded in fabrication planning is calculating panel size, checking layer stackup information, reviewing expected yields, reviewing board construction and verifying impedance control calculations. Typical panel sizes are 9 x 12˝, 12 x 18˝, 18 x 24˝, or 18 x 36˝. A number of factors need to be considered when calculating panel size. For instance, consider a small board of 25 sq. in. A relatively high number of this small board can be panelized...
How the CAM engineer can make the difference. Embedded in fabrication planning is calculating panel size, checking layer stackup information, reviewing expected yields, reviewing board construction and verifying impedance control calculations. Typical panel sizes are 9 x 12˝, 12 x 18˝, 18 x 24˝, or 18 x 36˝. A number of factors need to be considered when calculating panel size. For instance, consider a small board of 25 sq. in. A relatively high number of this small board can be panelized...
Printed Circuit Design & Fab Magazine on Facebook





