| Plating Anomalies and Defects, Part I |
|
|
| Written by Michael Carano | |||
| Wednesday, 03 June 2009 00:00 | |||
Plating defects can have multiple origins, so don’t jump to conclusions.It is a good idea to begin this month’s edition of Positive Plating by presenting a few different plating defects and discussing some of the possible causes and remedies to resolve the problem. Many of these defects have multiple origins. Defects can be the result of multiple problems throughout the manufacturing process, and this may not manifest in the process where the defect actually occurred. When trying to identify the root cause of a defect, it is often best to not jump to conclusions. Not understanding a defect’s true genesis will lead to incorrect remedies to these issues. I will discuss some defects and possible remedies.Blisters (Hole-Wall Pullaway)The common complaint one hears is, “The copper plating is peeling.” Ok, but where is it peeling from, off of the copper surface or from within the via? What about the interconnect? Is the peeling layer the electroless copper deposit or the electrolytic copper? These are the questions one must answer in order to properly trouble shoot the defect. FIGURE 1 shows a real-life example of a blistered or peeling deposit. The copper deposit has actually flaked off or blistered from the hole. In some cases, the deposit does not completely flake off the surface, but instead, pulls away from the hole wall. This condition is referred to as hole-wall pullaway (HWPA).Now the question is where is the origin of the blister? In this case, the good news is that we are only looking at the electroless copper. There has yet to be an electrolytic copper deposit applied to the circuit board, but that is all one can tell at this point. ![]() A more typical example of HWPA is depicted in FIGURE 2. The deposit pulled away from the hole-wall but did not fracture or flake off. Nonetheless, this is a defect and must be remedied. The root cause of HWPA is very similar to those that lead to flaking and blistering. So, one is dealing with the origin of the blister or peeling deposit prior to electrolytic copper plating. TABLE 1 lists the most common causes for this type of defect. Further information about the hole wall condition can be determined by a careful review of the microsection or through SEM analysis. ![]() ![]() Keep in mind that there is no substitute for process control. All of the operators should have a basic understanding of why certain processes must be controlled within the stated limits. This will go a long way in preventing costly rejects. PCD&F Michael Carano is global manager for strategic business development at OM Group, Inc. and can be reached at This e-mail address is being protected from spambots. You need JavaScript enabled to view it .
|
|||
| Last Updated on Wednesday, 03 June 2009 18:13 |
Design News
- Cadence Returns to Profitability in Q2
- NI Reports Stellar Q2; Record Year Forecast
- Mentor, NI Provide Test Feedback for Designers
- EDA Ranking Shakeup First in Years: UPDATED
- IPC Updates Surface Mount Land Pattern Standard
- Mentor Announces PCB Technology Leadership Awards
- Report: Q1 EDA Revenue Up 4.6% to $1.25B
- Registration Open for PCB West 2010
- New Parts Library Site Follows 'Wiki' Model
- Icahn Boosts Mentor Stake to 11%
Market News
- June NA Printed Circuit Orders Up 28%
- Semi Gear Orders Up Again in June
- Global Q2 PC Shipments Up 21%, Gartner Says
- Components Orders Hit 2-Year High
- US Electronic Warfare Systems Market to top $1.4B by 2015
- SIA: May Global Chip Sales Up 48% YoY
- June Manufacturing Grows at Slower Rate
- May PWB Orders Up 47% YoY
- Report: Q1 Notebook PCs Reach $31B
- Gartner Forecasts 113% Rise in Semi Gear Spending
Fab News
- Eurotech Constructs UK facilities
- DuPont's Electronics Unit Up 53% in Q2
- Sanmina-SCI Swings to Q3 Profit
- PWB Maker Schweizer Rebounds Big
- Meiko to Expand in China, Vietnam
- Camstar Buys SigmaQuest
- Multek Sales on Record Pace
- APCB to Buy CKL
- AT&S Turns in Big Fiscal Q1
- M-Flex Says Prelim. Q3 Sales Up Nearly 4%
Products
ANSYS Releases Ansoft Designer 6.0
Ansoft Designer 6.0 Solver on Demand technology analyzes signal-integrity, power-integrity and electromagnetic interference problems from a single schematic- and layout-based environment. Can access field and circuit simulation tools while designing electronic packages and PCBs early in the design cycle. Integrates HFSS 3-D electromagnetic field simulation software and HSPICE IC simulation. Can predict how high-frequency electromagnetic components affect ICs. Provides user interface to HSPICE with direct links to HFSS and access to the ANSYS QuickEye and VerifEye convolution and statistical...
Ansoft Designer 6.0 Solver on Demand technology analyzes signal-integrity, power-integrity and electromagnetic interference problems from a single schematic- and layout-based environment. Can access field and circuit simulation tools while designing electronic packages and PCBs early in the design cycle. Integrates HFSS 3-D electromagnetic field simulation software and HSPICE IC simulation. Can predict how high-frequency electromagnetic components affect ICs. Provides user interface to HSPICE with direct links to HFSS and access to the ANSYS QuickEye and VerifEye convolution and statistical...
Sponsor Links
Low Cost PCB Prototypes
PCB-POOL® manufactures high quality PCB prototypes at exceptional prices!
Receive instant quotes (no registration required) and order your PCBs directly online.
Special Offer: Free Laser SMD stencil with all prototype orders!
Need PCB prototypes fast?
Sunstone Circuits takes the pain out of prototyping! We are dedicated to making the online ordering of PCB prototypes simple, fast, and easy from quote to delivery. Quick access to our 24/7/365 customer service team and easy online order tracking takes the pain out of sourcing prototypes online.
Put us to the test - order Sunstone Circuits today!
Features
In Case You Missed It
Component Layout“PCB Design and Assembly for Flip-Chip and Die Size CSP”Author: Vern Solberg; vsolberg123@aol.com.Abstract: This paper outlines the basic elements furnished in the newly released IPC-7094, Design and Assembly Process Implementation for Flip-Chip and Die Size Components, providing a comparison of existing and emerging wafer-level and chip-size package methodologies. The focus is on the effect of PCB design and assembly of bare die or die-size components in an uncased or...
Component Layout“PCB Design and Assembly for Flip-Chip and Die Size CSP”Author: Vern Solberg; vsolberg123@aol.com.Abstract: This paper outlines the basic elements furnished in the newly released IPC-7094, Design and Assembly Process Implementation for Flip-Chip and Die Size Components, providing a comparison of existing and emerging wafer-level and chip-size package methodologies. The focus is on the effect of PCB design and assembly of bare die or die-size components in an uncased or...
Printed Circuit Design & Fab Magazine on Facebook





