Intercept Introduces Design Automation Products Print E-mail
User Rating: / 0
PoorBest 
Wednesday, 03 September 2008 13:47
ATLANTA, GA– Intercept Technology, Inc. introduced three new products, DrawingX, QCX and ReleaseX. The product suite works in conjunction to fully automate the post-processing of completed designs—from quality control checks to the production of drawing packages to the creation of release packages for final delivery.
 
According to the company, DrawingX allows users to fully automate drawing package creation, saving time and resources, and has options such auto-dimensioning and auto-generation of standard notes. QCX sustains a comprehensive set of rule checks for electrical, manufacturing and design rules that are specifically tailored to meet manufacturer’s needs. ReleaseX reduces the creation of design files, and output files can be posted on a user-specified FTP site. 
blog comments powered by Disqus
 

Products

ANSYS Releases Ansoft Designer 6.0
Ansoft Designer 6.0 Solver on Demand technology analyzes signal-integrity, power-integrity and electromagnetic interference problems from a single schematic- and layout-based environment. Can access field and circuit simulation tools while designing electronic packages and PCBs early in the design cycle. Integrates HFSS 3-D electromagnetic field simulation software and HSPICE IC simulation. Can predict how high-frequency electromagnetic components affect ICs. Provides user interface to HSPICE with direct links to HFSS and access to the ANSYS QuickEye and VerifEye convolution and statistical...

Search

Search

Login

CB Login

Language

Language

English French German Italian Portuguese Russian Spanish
 

Features

In Case You Missed It
Component Layout“PCB Design and Assembly for Flip-Chip and Die Size CSP”Author: Vern Solberg; vsolberg123@aol.com.Abstract: This paper outlines the basic elements furnished in the newly released IPC-7094, Design and Assembly Process Implementation for Flip-Chip and Die Size Components, providing a comparison of existing and emerging wafer-level and chip-size package methodologies. The focus is on the effect of PCB design and assembly of bare die or die-size components in an uncased or...

Current Issue

June 2010 cover

Parts


Find and quote components




Powered by


Terms Of Use

Printed Circuit Design & Fab Magazine on Facebook