CST Launches BoardCheck EMC Analysis Tool Print E-mail
Written by Mike Buetow   
Friday, 31 August 2012 12:57

BoardCheck provides overviews of potential EMC and SI problems in PCB layout.

Checks nets critical to the design against a number of individually selectable, established design rules to ensure EMC and signal integrity. EMC rules include net reference (net crossing split), wiring, crosstalk (critical net near I/O net), decoupling (capacitor density), and placement (I/O filter distance). SI rules include net integrity (net length) and via integrity (unconnected via pads). Generates a report listing all violations. Supports a multitude of formats such as Cadence Allegro, Zuken CR 5000, Mentor Graphics Expedition and ODB++, which are read-in using internal import filters.

 

Computer Simulation Technology, www.cst.com

 


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