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Cover-Extend Eliminates Test Points for In-Circuit Test |
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Written by Philip Buonpastore
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Friday, 21 March 2008 |
Agilent Technologies Inc. has released a limited access solution
for In-Circuit Test (ICT) users that reportedly eliminates the need for
physical test points. According to the company, Cover-Extend is
part of the VTEP v2.0 powered test suite, and is a hybrid between the
Boundary Scan test and VTEP Vectorless Test methodologies used in
electronic manufacturing.
Cover-Extend uses stimulus provided by boundary scan cells, which do
not require physical test points. The benefits include claimed improved
test coverage, savings on fixturing operating cost, and strain relief
on solder joints, resulting from fewer test probes needed underneath
high-density ICs (e.g., BGAs).
"Cover-Extend addresses key concerns in today's manufacturing
environment - cost, coverage, quality and speed," said Daniel Mak, VP
and GM of Agilent's Measurement Systems Division. "The results we are
getting from our customers' lines are very positive, and we will
implement Cover-Extend in full-scale production environments…in April."
Agilent will conduct live demonstrations of Cover-Extend at two major
test and inspection tradeshows: Apex 2008, April 1-3 in Las Vegas, NV,
and Nepcon Shanghai 2008, April 8-11, Shanghai, China.
www.agilent.com
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New Product |
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CSP/BallNest Socket Provides Consistant Test and Burn-In |
Aries Electronics introduces the CSP/BallNest Hybrid Socket for test or burn-in of chip scale package, ball grid array, microBGA, land grid array and prototyping.
It can be used on any device having a pitch of 0.30 mm or larger. Features include a lid that nests each ball termination into the socket for a reliable connection and a four-point crown providing scrub on solder oxides.
It has a signal path of 0.0777 inches and provides minimal signal loss for higher bandwidth capability. Estimated contact life is 500,000 cycles, and the socket is available in custom materials, sizes, configurations and platings.
www.arieselec.com |
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