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Celestica and Microsoft Develop BEE3 Prototype Print E-mail
Written by Philip Buonpastore   
Thursday, 06 March 2008


TORONTO - Celestica Inc. has announced a collaboration with Microsoft on the design of the BEE3, or Berkeley Emulation Engine 3rd version.


According to the company, the prototype platform enables emulation of a multi-core processor environment with at least 1000 cores. Using four interconnecting field-programmable gate arrays (FPGAs) linked to high-speed interfaces, the platform can incorporate a single board to 64 boards (256 FPGAs) as needed for computations, and can be used to perform large-scale research in areas such as ECAD, scientific computing and computer architecture emulation.

"We are dedicated to developing new and innovative technologies that will shape the future computing experience," said Microsoft's Chuck Thacker. "Based on our experience with Celestica, we knew their engineering talent, experience and CoreSim design tools would help ensure the successful development of this innovative platform."

Celestica, who collaborated with Microsoft on the prototypes, was responsible for hardware specification, schematic capture, layout, signal integrity analysis, static timing analysis, schematic modeling, design for test and manufacturing.

"We are excited Microsoft chose to utilize our talent and expertise in design to develop this innovative technology that could contribute to the future of computing," said Brian Lau, VP of Celestica. "We have a strong track record with Microsoft and are proud of our ability to provide a broad range of services to meet their needs."

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