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Industry Luminaries Join PCD&M's Editorial Advisory Board
Written by Kathy Nargi-Toth
Monday, 17 September 2007
SMYRNA, GA – Printed Circuit Design and Manufacture magazine announced that Istvan Novak, Happy Holden, George Dudnikov and Michael Carano have been added to its Editorial Advisory Board.
The Editorial Advisory Board helps guide the editorial content of Printed Circuit Design and Manufacture, providing advice on topics and potential authors. They join current members Eric Bogatin of Be The Signal and Jack Fisher of Interconnect Technology Analysis on the EAB for the upcoming year.
Carano, vice president of technical operations for Electrochemicals Inc, has authored numerous articles in the areas of copper plating, tin plating, PCB technologies, and analytical control of electroplating baths, several as a regular columnist for Printed Circuit Design and Manufacture. He is IPC director and a member and teacher with the American Electroplaters and Surface Finishers Society.
Dudnikov is senior vice president and Chief Technology Officer for the Printed Circuit Board Division of Sanmina-SCI, a top tier EMS provider. He is responsible for all engineering functions as well as setting the divisions technical direction and strategy. He has over 28 years experience in engineering and operations management working for companies such as Photocircuits, Northern Telecom, Hadco and Sanmina-Sci. He holds a BSME from Columbia University in New York.
Holden, a senior technologist with Mentor Graphics Corp., is a leading authority on designing PWBs with HDI and embedded components. He has authored over 90 technical papers, and is a regular instructor at the PCB Design conferences. He has a bachelor’s in chemical engineering and a master’s in computer science from Oregon State University. After spending the bulk of his career at Hewlett-Packard, he has worked for Westwood Associates, TechLead Corp. and Merix.
Novak is a distinguished engineer at Sun Microsystems Inc., where he is engaged in the design and characterization of power-distribution networks and packages for Sun servers, and is known for expertise in signal integrity design of high-speed serial and parallel buses. Novak has over 20 years experience with high-speed digital, RF and analog circuits and system design. He is an IEEE Fellow for his contributions to the fields of signal-integrity, RF measurements and simulation methodologies.
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CSP/BallNest Socket Provides Consistant Test and Burn-In
Aries Electronics introduces the CSP/BallNest Hybrid Socket for test or burn-in of chip scale package, ball grid array, microBGA, land grid array and prototyping. It can be used on any device having a pitch of 0.30 mm or larger. Features include a lid that nests each ball termination into the socket for a reliable connection and a four-point crown providing scrub on solder oxides. It has a signal path of 0.0777 inches and provides minimal signal loss for higher bandwidth capability. Estimated contact life is 500,000 cycles, and the socket is available in custom materials, sizes, configurations and platings. www.arieselec.com
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