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New Design Kit Reduces Time to Market

Written by Kathy Nargi-Toth
Tuesday, 05 June 2007
ROCHESTER, N.Y. - EMA Design Automation released TimingDesigner 9.0 that features Design Kits with assembled diagrams and libraries for commonly used parts and interface protocol standards. The TimingDesigner design kits are pre-assembled component timing diagrams complete with all specified libraries for speed and voltage ratings. The kits have all documented timing protocols associated with one or more design components. According to EMA they are intended to give designers a quick start for timing analysis of their designs. TimingDesigner is proposed to aid high-speed, multi-frequency designs by accurately modeling and analyzing the signal relationships between devices on a board or between embedded functions on an ASIC or FPGA. According to EMA it can evaluate comprehensive sets of timing alternatives and provide direction to the most complex of timing challenges. TimingDesigner 9.0 will be available July 1, 2007.

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New Product

CSP/BallNest Socket Provides Consistant Test and Burn-In

Aries Electronics introduces the CSP/BallNest Hybrid Socket for test or burn-in of chip scale package, ball grid array, microBGA, land grid array and prototyping.

It can be used on any device having a pitch of 0.30 mm or larger. Features include a lid that nests each ball termination into the socket for a reliable connection and a four-point crown providing scrub on solder oxides.

It has a signal path of 0.0777 inches and provides minimal signal loss for higher bandwidth capability. Estimated contact life is 500,000 cycles, and the socket is available in custom materials, sizes, configurations and platings.

www.arieselec.com