You must be registered to access the full content of this site. To register, click here.
Part Search
Micrologic Joins Cadence Connections Program
Written by Tracy Heffner
Wednesday, 23 May 2007
WEST HOLLYWOOD, CA – Micrologic Inc. has joined the Cadence Connections program of Cadence Design Systems Inc., which promotes open interoperability between Cadence technologies and other companies' design tools.
Micrologic's nanoRVInteractive software integrates with the Virtuoso Layout Editor platform, and offers interactive reliability-aware design environment that can reportedly reduce reliability verification time by more than 50%.
"We are pleased to work with Cadence to champion and support open industry standards. Our goal is to provide integrated circuit designers using Virtuoso Layout Editor platform with a seamless interface to our nanoRVInteractive software to aid them with reliability issues, especially with complex nanometer designs," said Danny Rittman, president and founder of Micrologic.
According to Micrologic, nanoRVInteractive brings interactive automation to the current manual process of integrated circuits layout design, providing reliability solutions, reducing design time and pushing products to market sooner at reduced costs. nanoRVInteractive is a nanometer range EDA tool that is said to interactively eliminate reliability issues during the construction of integrated circuit's physical design. The tool automatically checks for reliability phenomenons including, but not limited to, electromigration, self-heat and voltage drop during the construction of IC layout.
Need PCB prototypes fast?
Sunstone Circuits takes the pain out of prototyping! We are dedicated to making the online ordering of PCB prototypes simple, fast, and easy from quote to delivery. Quick access to our 24/7/365 customer service team and easy online order tracking takes the pain out of sourcing prototypes online.
Put us to the test - order Sunstone Circuits today!
PCB systems design teams face challenges with IP management and collaboration across multiple groups. This free Webinar highlights best practices that optimize these efforts across the design flow. Learn more!
CSP/BallNest Socket Provides Consistant Test and Burn-In
Aries Electronics introduces the CSP/BallNest Hybrid Socket for test or burn-in of chip scale package, ball grid array, microBGA, land grid array and prototyping. It can be used on any device having a pitch of 0.30 mm or larger. Features include a lid that nests each ball termination into the socket for a reliable connection and a four-point crown providing scrub on solder oxides. It has a signal path of 0.0777 inches and provides minimal signal loss for higher bandwidth capability. Estimated contact life is 500,000 cycles, and the socket is available in custom materials, sizes, configurations and platings. www.arieselec.com
News 
