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New Cadence Allegro Released |
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Written by Tracy Heffner
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Monday, 25 July 2005 |
SAN JOSE – Cadence Design Systems Inc. has released the latest release of the Cadence Allegro system interconnect design platform.
The technology is said to shorten design cycle time by enabling team-based PCB system design throughout the design flow. It allegedly strengthens the design chain by helping IC companies distribute Spectre transistor-level models so that their customers can design-in complex ICs faster. The release includes new technology for multi-style design creation, real-time design for assembly (DFA) driven placement and an improved constraint-driven design flow.
"We are especially pleased with Allegro's new real-time DFA driven placement capability," said Charlie Davies, ECAE Application Engineer of Harris Government Communication Systems Division. "This feature guides component placement, allowing us to create manufacturable designs appreciably faster. This capability further enhances Cadence's Constraint Driven PCB Design Flow."
Allegro now includes Allegro Design Editor, a PCB multi-style design creation environment. It is said to help make design creation up to 10 times faster with a spreadsheet-like interface, schematics and Verilog-language-sensitive editor customized for PCB design.
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