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ATI, Cadence and TSMC Produce Fabless Chip
Written by Tracy Heffner
Monday, 13 June 2005
ANAHEIM, CA – ATI Technologies Inc., Cadence Design Systems Inc. and Taiwan Semiconductor Manufacturing Company (TSMC) are reported to have successfully produced the industry's first X Architecture device. The
ATI chip is a high-volume PCI-Express graphics processor designed for
desktop and notebook computers. Diagonal interconnects are said to
reduce chip costs, increase performance and lower power consumption. The
ATI device was implemented using the Cadence X Architecture design
solution and manufactured using TSMC's 0.11-micron process. This
implementation eliminated one metal layer from the original Manhattan
design, allegedly reducing die costs.
The new device is expected to enter volume production late in the year. "The
X Architecture opens up a host of new possibilities for innovation in
chip design," said Greg Buchner, vice president of Engineering at ATI.
"As the industry leader in advanced graphics and digital media
processors, ATI has long been a pioneer in adopting new chip design
technologies. Using the Cadence X Architecture design solution, we have
been able to increase the performance envelope while reducing costs,
providing new opportunities and possibilities within our PC and
consumer businesses."
"Our
multi-year collaboration with Cadence has yielded tangible results. We
became the first foundry to develop X Architecture design rules. Today,
we are in early engagement with customers on 90-nanometer X
Architecture designs and are currently developing 65-nanometer X
Architecture design rules," said Dr. Ping Yang, TSMC vice president,
R&D. "ATI's chip validates TSMC's production-readiness of the X
Architecture as a viable design alternative."
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